Chisel (programming language)

Chisel is based on Scala as a domain-specific language (DSL). Chisel inherits the object-oriented and functional programming aspects of Scala for describing digital hardware. Using Scala as a basis allows describing circuit generators. High quality, free access documentation exists in several languages.

Circuits described in Chisel can be converted to a description in Verilog for synthesis and simulation.

Code examples

A simple example describing an adder circuit and showing the organization of components in Module with input and output ports:

<span id="mwJQ"></span><span class="k" id="mwJg">class</span><span class="w" id="mwJw"> </span><span class="nc" id="mwKA">Add</span><span class="w" id="mwKQ"> </span><span class="k" id="mwKg">extends</span><span class="w" id="mwKw"> </span><span class="nc" id="mwLA">Module</span><span class="w" id="mwLQ"> </span><span class="p" id="mwLg">{</span> <span class="w" id="mwLw"> </span><span class="kd" id="mwMA">val</span><span class="w" id="mwMQ"> </span><span class="n" id="mwMg">io</span><span class="w" id="mwMw"> </span><span class="o" id="mwNA">=</span><span class="w" id="mwNQ"> </span><span class="nc" id="mwNg">IO</span><span class="p" id="mwNw">(</span><span class="k" id="mwOA">new</span><span class="w" id="mwOQ"> </span><span class="nc" id="mwOg">Bundle</span><span class="w" id="mwOw"> </span><span class="p" id="mwPA">{</span> <span class="w" id="mwPQ"> </span><span class="kd" id="mwPg">val</span><span class="w" id="mwPw"> </span><span class="n" id="mwQA">a</span><span class="w" id="mwQQ"> </span><span class="o" id="mwQg">=</span><span class="w" id="mwQw"> </span><span class="nc" id="mwRA">Input</span><span class="p" id="mwRQ">(</span><span class="nc" id="mwRg">UInt</span><span class="p" id="mwRw">(</span><span class="mi" id="mwSA">8</span><span class="p" id="mwSQ">.</span><span class="nc" id="mwSg">W</span><span class="p" id="mwSw">))</span> <span class="w" id="mwTA"> </span><span class="kd" id="mwTQ">val</span><span class="w" id="mwTg"> </span><span class="n" id="mwTw">b</span><span class="w" id="mwUA"> </span><span class="o" id="mwUQ">=</span><span class="w" id="mwUg"> </span><span class="nc" id="mwUw">Input</span><span class="p" id="mwVA">(</span><span class="nc" id="mwVQ">UInt</span><span class="p" id="mwVg">(</span><span class="mi" id="mwVw">8</span><span class="p" id="mwWA">.</span><span class="nc" id="mwWQ">W</span><span class="p" id="mwWg">))</span> <span class="w" id="mwWw"> </span><span class="kd" id="mwXA">val</span><span class="w" id="mwXQ"> </span><span class="n" id="mwXg">y</span><span class="w" id="mwXw"> </span><span class="o" id="mwYA">=</span><span class="w" id="mwYQ"> </span><span class="nc" id="mwYg">Output</span><span class="p" id="mwYw">(</span><span class="nc" id="mwZA">UInt</span><span class="p" id="mwZQ">(</span><span class="mi" id="mwZg">8</span><span class="p" id="mwZw">.</span><span class="nc" id="mwaA">W</span><span class="p" id="mwaQ">))</span> <span class="w" id="mwag"> </span><span class="p" id="mwaw">})</span> <span class="w" id="mwbA"> </span><span class="n" id="mwbQ">io</span><span class="p" id="mwbg">.</span><span class="n" id="mwbw">y</span><span class="w" id="mwcA"> </span><span class="o" id="mwcQ">:=</span><span class="w" id="mwcg"> </span><span class="n" id="mwcw">io</span><span class="p" id="mwdA">.</span><span class="n" id="mwdQ">a</span><span class="w" id="mwdg"> </span><span class="o" id="mwdw">+</span><span class="w" id="mweA"> </span><span class="n" id="mweQ">io</span><span class="p" id="mweg">.</span><span class="n" id="mwew">b</span> <span class="p" id="mwfA">}</span>

A 32-bit register with a reset value of 0:

<span id="mwgA"></span><span class="kd" id="mwgQ">val</span><span class="w" id="mwgg"> </span><span class="n" id="mwgw">reg</span><span class="w" id="mwhA"> </span><span class="o" id="mwhQ">=</span><span class="w" id="mwhg"> </span><span class="nc" id="mwhw">RegInit</span><span class="p" id="mwiA">(</span><span class="mi" id="mwiQ">0</span><span class="p" id="mwig">.</span><span class="nc" id="mwiw">U</span><span class="p" id="mwjA">(</span><span class="mi" id="mwjQ">32</span><span class="p" id="mwjg">.</span><span class="nc" id="mwjw">W</span><span class="p" id="mwkA">))</span>

A multiplexer is part of the Chisel library:

<span id="mwlQ"></span><span class="kd" id="mwlg">val</span><span class="w" id="mwlw"> </span><span class="n" id="mwmA">result</span><span class="w" id="mwmQ"> </span><span class="o" id="mwmg">=</span><span class="w" id="mwmw"> </span><span class="nc" id="mwnA">Mux</span><span class="p" id="mwnQ">(</span><span class="n" id="mwng">sel</span><span class="p" id="mwnw">,</span><span class="w" id="mwoA"> </span><span class="n" id="mwoQ">a</span><span class="p" id="mwog">,</span><span class="w" id="mwow"> </span><span class="n" id="mwpA">b</span><span class="p" id="mwpQ">)</span>