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History

The CVT16 instruction set, announced by AMD on May 1, 2009, is an extension to the 128-bit SSE core instructions in the x86 and AMD64 instruction set.

CVT16 is a revision of part of the SSE5 instruction set proposal announced on August 30, 2007, which is supplemented by the XOP and FMA4 instruction sets. This revision makes the binary coding of the proposed new instructions more compatible with Intel's AVX instruction extensions, while the functionality of the instructions is unchanged.

In recent documents, the name F16C is formally used in both Intel and AMD x86-64 architecture specifications.

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Source and licence. Adapted from the Wikipedia article “F16C” (this version, 2024-06-08) by its contributors, shared under CC BY-SA 4.0. Lablypedia has left out its tables, references and most pictures, and linked it to other Lablypedia articles.