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Bank switching

Technique to increase usable memory

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Through Processor (computing) and Microprocessor

Bank switching originated in minicomputer systems. Many modern microcontrollers and microprocessors use bank switching to manage random-access memory, non-volatile memory, input-output devices and system management registers in small embedded systems. The technique was common in 8-bit microcomputer systems. Bank-switching may also be used to work around limitations in address bus width, where some hardware constraint prevents straightforward addition of more address lines, and to work around limitations in the ISA, where the addresses generated are narrower than the address bus width. Some control-oriented microprocessors use a bank-switching technique to access internal I/O and control registers, which limits the number of register address bits that must be used in every instruction.

Unlike memory management by paging, data is not exchanged with a mass storage device like disk storage. Data remains in quiescent storage in a memory area that is not currently accessible to the processor (although it may be accessible to the video display, DMA controller, or other subsystems of the computer) without the use of special prefix instructions.

Technique

Bank switching can be considered as a way of extending the address space of processor instructions with some register. Examples:

  • The original CDC 160 processor has 12-bit addresses; the follow-up CDC 160-A processor, a follow-on to the CDC 160, has a 15-bit address bus, but there is no way to directly specify the high three bits on the address bus. Internal bank registers can be used to provide those bits.
  • The CDC 1604 has 15-bit addresses; the follow-on CDC 3600 system has an 18-bit address bus, but legacy instructions only have 15 address bits; internal bank registers can be used to provide those bits. Some new instructions can explicitly specify the bank.
  • A processor with a 16-bit external address bus can only address 216 = 65536 memory locations. If an external latch was added to the system, it could be used to control which of two sets of memory devices, each with 65536 addresses, could be accessed. The processor could change which set is in current use by setting or clearing the latch bit.
    The latch can be set or cleared by the processor in several ways; a particular memory address may be decoded and used to control the latch, or, in processors with separately-decoded I/O addresses, an output address may be decoded. Several bank-switching control bits could be gathered into a register, approximately doubling the available memory spaces with each additional bit in the register.
    Because the external bank-selecting latch (or register) is not directly connected with the program counter of the processor, it does not automatically change state when the program counter overflows; this cannot be detected by the external latch since the program counter is an internal register of the processor. The extra memory is not seamlessly available to programs. Internal registers of the processor remain at their original length, so the processor cannot directly span all of bank-switched memory by, for example, incrementing an internal register. Instead the processor must explicitly do a bank-switching operation to access large memory objects. There are other limitations. Generally a bank-switching system will have one block of program memory that is common to all banks; no matter which bank is currently active, for part of the address space only one set of memory locations will be used. This area would be used to hold code that manages the transitions between banks, and also to process interrupts.

Often a single database spans several banks, and the need arises to move records between banks (as for sorting). If only one bank is accessible at a time, it would be necessary to move each byte twice: first into the common memory area, perform a bank switch to the destination bank, and then actually to move the byte into the destination bank. If the computer architecture has a DMA engine or a second CPU, and its bank access restrictions differ, whichever subsystem can transfer data directly between banks should be used.

Unlike a virtual memory scheme, bank-switching must be explicitly managed by the running program or operating system; the processor hardware cannot automatically detect that data not currently mapped into the active bank is required. The application program must keep track of which memory bank holds a required piece of data, and then call the bank-switching routine to make that bank active. However, bank-switching can access data much faster than, for example, retrieving the data from disk storage.

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